1. Field of Invention
This invention relates generally to read-only memories (ROMs) and a method for manufacturing the same, and more particularly to ROMs and a manufacturing method for ROMs having a trench-type gate structure buried within a substrate and a source/drain terminal structure formed above the substrate.
2. Description of Related Art
ROMs are widely used in digital equipment such as microcomputers and microprocessor operating systems. ROMs normally store resident programs, such as BIOS used by operating systems. ROM manufacturing processes involve time-consuming steps and material processes. Generally, ROM customers submit program codes to a ROM manufacturer, and the ROM manufacturer encodes the program codes into the ROM during manufacturing.
Despite the different program codes stored during manufacturing, most ROMs have identical physical structures. Therefore, ROM manufacturers complete ROM manufacturing to a state immediately before actual programming, and then store the partially finished ROMs in a warehouse. When customers order ROMs requiring a particular program code, the manufacturer creates a set of photomasks and subsequently program,s the partially-finished ROMs in inventory with the program code provided by the customer. This procedure of photomask programming a prefabricated ROM has become the norm in the semiconductor manufacturing industry.
Generally, a basic memory cell unit of a ROM comprises a channel transistor. During the programming phase, ions are selectively implanted into specified channels of the channel transistor, adjusting the threshold voltage thereof and achieving ON/OFF control of the memory cell unit. FIGS. 1A-1C show the manufacturing steps involved in the creation of a conventional ROM. FIG. 1A is a partial top view, FIG. 1B is a partial front view, and FIG. 1C is a partial cross-sectional side view of the conventional ROM. As shown, the conventional ROM includes a substrate 10, such as, for example, a P-type silicon substrate, having a plurality of bit lines 11, an oxide layer 12 and a plurality of word lines 13 formed on a top surface of substrate 10. Referring to FIG. 1A, areas 14 enclosed by the rectangular dash lines comprise the memory cell units. Whether or not ions are implanted into a channel 16 of the memory cell unit determines if the memory cell unit contains a binary bit of "0" or "1", respectively.
As shown in FIG. 1C, N-type impurities, such as arsenic ions, are implanted into substrate 10 forming the plurality of equidistant bit lines 11, wherein the areas between two bit lines 11 constitute channel regions 16. Next, an oxidation process forms an oxide layer 12 on the surface of bit lines 11 and channel regions 16. A conductive layer, such as for example, a heavily doped polysilicon layer, is subsequently formed, followed by photolithographic and etching processes that form word lines 13 crossing over bit lines 11, and thus form the completed prefabricated conventional ROM.
In the programming phase of manufacturing the conventional ROM, program codes are encoded in the ROM by forming a masking layer 15 on the surface of word lines 13 that exposes channel regions 16 to be encoded. The programming phase is complete upon implantation of P-type impurities, such as, for example, boron ions, in the exposed channel regions 16. Different doping sources may be used during the programming phase so to obtain different properties for the transistors.
FIGS. 2A and 2B show another conventional ROM. FIG. 2A is a partial top view and FIG. 2B is a cross-sectional side view of the second conventional ROM. The area 24 within the rectangular dash lines of FIG. 2A comprises the memory cell unit. The manufacturing method for the conventional ROM shown in FIGS. 2A and 2B comprises the steps of implanting N-type impurities, such as, for example, arsenic ions, into a substrate 20 forming a plurality of equidistant source/drain terminals 21, wherein the area between two source/drain terminals 21 constitutes a channel region 25. A subsequent step comprises encoding program codes in the ROM by exposing channel regions 25 to be encoded to implantation of P-type impurities, such as, for example, boron ions. A further step includes forming an oxide layer 22 and a conductive layer, such as a heavily doped polysilicon layer. Thereafter, the method comprises the step of forming the conductive layer into word lines 23, constituting channel transistors, by using photolithographic and etching processes. A subsequent step includes forming an insulating layer 27 on word lines 23 and providing a plurality of contact window openings 28 in the insulating layer 27, wherein a bottom portion of the plurality of contact window openings 28 is connected to source/drain terminals 21. Finally, the method comprises the step of forming contact windows 26 by filling the plurality of contact window openings 28 with a metal, such as aluminum.